Ultra Low-voltage Multiple-loop Feedback Switched-capacitor Filters

Abstract

This work presents an SC filter design technique based on a CMOS inverter. The proposed technique is demonstrated by the design of the sixth-order Follow the Leader Feedback (FLF) Chebyshev low-pass filter. This technique resulted in filters with reduced sensitivities compared to the cascade realization. This design was simulated using the TSMC65nm technology at a low supply voltage of 0.7V. The characteristics of the designed filter are 1dB pass band ripple with a 3dB bandwidth of 0.8MHz and an attenuation of 40dB with an ultra low power consumption of only 1.8μW which is far less compared to the existing op-amp based filter designs. Also, the Dynamic Threshold MOS (DTMOS) integrator for ultra-low supply voltage (sub-threshold operation) is proposed and a low frequency SC filter is realized for biomedical application where ultra low-voltage operation and ultra low power consumption is an important factor.