Techniques for enhancing the performance of bulk-driven circuits in nano-scale CMOS technology

Abstract

Bulk-driven (BD) technique has been proposed to remedy the voltage swing limitation problem in modern CMOS technology. However, challenges exist when the CMOS technologies move to the nanometer-scale. The goal of this research work is to develop techniques to overcome certain challenges resulting from the scaling down of the CMOS technologies. Furthermore, the results are applied to analyze nano-scale BD CMOS circuits and develop novel high performance circuits.

The mixing mechanism of BD mixers is analyzed comprehensively for the first time, using two different models to demonstrate the importance of model selection, which is one of the challenging tasks in scaling CMOS technology. The mixing mechanism is developed for different BD mixer structures and different local oscillator (LO) waveforms using the square-law model, and a compound mixing product is found. Based on this analysis, including the short-channel effects in nano-scale CMOS technology, a more advanced model is used to study the optimal bias condition for harmonic rejection (HR). A novel design method to suppress HR is proposed for wideband applications. Two BD mixers are fabricated in 65 nm CMOS technology; and this design methodology is verified by measurement results.

Nonlinearity analysis is another challenging subject in nano-scale CMOS circuits. A detailed distortion analysis of nano-scale (65 nm) BD and gate-driven (GD) CMOS RF amplifier is completed using Volterra series.

In this work, it is found that the effect of the nonlinear output conductance and the cross-terms among v_gs,v_ds,and v_bs must be included in the analysis of the MOSFET at nano-scales. The first three-order Volterra kernels are computed; and the closed-form expressions of the second-order and third-order harmonic distortion (HD) are derived, which can provide more insight into the nonlinearity of nano-scale amplifier. Distortion-aware design guidelines for nano-scale CMOS amplifier are provided. An ultra-compact current model is chosen for this quantitative analysis; and it is modified in this research to be adapted to nano-scale BD MOSFET.

Further, to suppress the third-order intermodulation (IM3) product of differential BD RF amplifier, a modified second-order intermodulation (IM2) injection technique is proposed based on a system-level nonlinearity analysis using Volterra series.