Browsing by Author "66673d51-fb98-440c-a30e-d42b2548ad65"
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MISMATCH INSENSITIVE VOLTAGE TO TIME CONVERSION AND CLOCK DISTRIBUTION TOPOLOGIES FOR THREE DIMENSIONAL INTEGRATED CIRCUITS
Sandhu, Tejinder Singh (2019-11-28)Reduced voltage dynamic range and increased mismatch between identical circuit components become pressing challenges as the transistor dimensions enter the nanometer scale. Recently, through silicon via (TSV) technology ...